Capacitor arrester installation specifications

Do capacitor banks need surge arresters?

Many capacitor banks are operated without surge arresters. However, there are a variety of reasons to instal arresters: To prevent capacitor failures at a breaker restrike or failure. To limit the risk of repeated breaker restrikes. To prolong the service life of the capacitors by limiting high overvoltages.

How does capacitor size affect surge arrester energy stress?

The following results are obtained: A single-stage capacitor bank (Fig.1) is used to vary the three-phase bank size in order to evaluate the effect on the surge arrester energy stress. Depending on the arrester arrangement, a linear increase of the energy dissipated in the arrester is obtained.

How do I determine the length of an arrester?

For this purpose, the length of the arrester with its connection to the earthing system must also be taken into consideration (L=L1+L 2). The distance L between the installation location of the arrester and the equip-ment to be protected is therefore of crucial importance.

How do I select the voltage rating of an arrester?

Selecting the arrester voltage rating which is based on whether or not the system is grounded and the method of system grounding. Selecting the class of arrester, from the three classes of arresters, in order of protection, capability and cost. The classes are: Station class, Intermediate class and Distribution class.

Can a surge arrester protect a capacitor?

Generally speaking, capacitor protection by surge arresters has been a difficult task before Z n O arresters became available. The high discharge currents and possible energies associated with an arrester operation at a capacitor bank heavily stressed the spark gaps in a S i C gapped arrester.

What should be considered when installing an arrester?

When installing an arrester, the distance to the operating equipment requiring protection must be observed. A rough esti-mation of the protection area can be derived from the following considerations (see Figure 8):